This invention relates to a method of making an MOS-type semiconductor device having an improved flat surface on which a conductor layer is to be disposed.
Hitherto known silicon gate MOS-type semiconductor devices have usually had a construction as shown in FIG. 1. Numeral 1 represents a silicon substrate, wherein a source region 2 and drain region 3 are formed. On the silicon substrate 1 are provided insulating layers 4a and 4b of SiO.sub.2 and gate insulating film 5 of SiO.sub.2. A gate electrode 6 of polycrystalline silicon is provided on the gate insulating film 5. The insulating layer 4b has provided thereon a polycrystalline silicon layer 7 for a conductor. The insulating layers 4a and 4b, the gate electrode 6 and the polycrystalline silicon layer 7 are covered by insulating layers 8a, 8b and 8c of SiO.sub.2. Conductor layers 9a and 9b of aluminum are provided for connection with the source region 2 and the drain region 3. Since steps are formed between the upper surfaces of the insulating layers 8a, 8b and 8c and the upper surfaces of the source 2 and the drain 3 in above-described construction, the thickness of the conductor layers 9a and 9b at the corners of the step is relatively small. Therefore the conductor layers 9a and 9b are easily broken at such portions. To avoid such breaking, the conductor layers 9a and 9b must be sufficiently thick or wide. Further the above-mentioned step reduces the accuracy of transcription in photo-lithography process. These are the factors preventing the device as shown in FIG. 1 from being included in integrated circuits to any great degree.